|
|
 |
|
|
| IA Memory Ordering |
 |
Google Tech Talks
February, 28 2008
ABSTRACT
Intel recently published more precise memory
ordering principles for the
IA32 and Intel Architecture 64 (aka x86)
processors. This talk discusses
the key principles embodied in this memory
ordering and explains some of
the software driven motivation behind them.
Along the way we discuss
issues such as publication safety and how to
use the principles to
implement the memory models found in high
level programming languages.
The presentation is aimed at developers of
concurrent shared memory
software and will provide a presentation of
the principles as well as
guidance on how to reason about them.
This is joint work with Bratin Saha and many
others both inside as well
as outside Intel.
Speaker: Richard L. Hudson
Richard L. Hudson is best known for his work
in memory management
including the invention of both the Train
Algorithm and the Sapphire
Algorithm. Richard joined Intel in 1998 where
he has worked on memory
management, concurrency, synchronization, and
memory model related issues. He went to
Shortridge, holds a B.A. degree from
Hampshire College and an M.S. degree from the
University of Massachusetts.
Tags : google techtalks techtalk engedu talk talks googletechtalks education |
|
Affichage : 4011
Durée : 2612 s |
|
|
|
|
|
|
|
|
|
|
 |
| |
|
